Max Clock Speed
I used Verilog to do a simple test to estimate the machine’s top clock speed. I kept increasing the clock rate until the validation test suite started failing, and it topped out at about 2.63MHz. That feels respectable for a home-built machine. In reality I think I can go faster than that, since the timing data for my Verilog simulation is built around the worst-case estimates. Depending where the critical path is (I didn’t investigate to see), I may also be able to speed it up further by using a two-phase clock. Of course this all assumes I’m not limited by signal noise or some other intrusion of physics into the digital domain!
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You’ll probably find that you’ll be faster if you make a proper board. Verilog models aren’t very accurate in my experience, and that’s without discrete parts. My rule of thumb has been 1Mhz per meter of copper bus and double the speed as you 1/2 the length.
Looks like an interesting project, good luck!
Thanks, I hope you’re right. How was your rule of thumb derived? Since it only considers the length of the bus wires, are you assuming that the propagation delay of the chips themselves will be negligible in comparison? Many of these old 7400-series parts are pretty slow (propagation delays up to 100ns for some).